Invention Publication
- Patent Title: ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF, AND SUBSTRATE STRUCTURE
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Application No.: US18145824Application Date: 2022-12-22
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Publication No.: US20240145372A1Publication Date: 2024-05-02
- Inventor: Chia-Wen TSAO , Wen-Chen HSIEH , Yi-Lin TSAI , Hsiu-Fang CHIEN
- Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
- Applicant Address: TW Taichung
- Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
- Current Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
- Current Assignee Address: TW Taichung
- Priority: TW 1140684 2022.10.26
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/56 ; H01L23/31 ; H05K1/11 ; H05K1/18
Abstract:
A substrate structure is provided, in which an insulating protection layer is formed on a substrate body having a plurality of electrical contact pads, and the insulating protection layer has a plurality of openings corresponding to the plurality of exposed electrical contact pads, and the insulating protection layer is formed with a hollow portion surrounding a partial edge of at least one of the electrical contact pads at at least one of the openings, so as to reduce the barrier of the insulating protection layer.
Public/Granted literature
- US12154848B2 Electronic package and manufacturing method thereof, and substrate structure Public/Granted day:2024-11-26
Information query
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