Invention Publication
- Patent Title: SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR STRUCTURE FOR MEMORY DEVICE AND METHOD FOR FORMING THE SAME
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Application No.: US18442116Application Date: 2024-02-15
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Publication No.: US20240188278A1Publication Date: 2024-06-06
- Inventor: Yukihiro Nagai
- Applicant: UNITED MICROELECTRONICS CORP. , Fujian Jinhua Integrated Circuit Co., Ltd.
- Applicant Address: TW Hsin-Chu City
- Assignee: UNITED MICROELECTRONICS CORP.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee: UNITED MICROELECTRONICS CORP.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee Address: TW Hsin-Chu City; CN Quanzhou City
- Priority: CN 1710116628.1 2017.03.01
- The original application number of the division: US16102715 2018.08.13
- Main IPC: H10B12/00
- IPC: H10B12/00

Abstract:
A method for forming a semiconductor structure for a memory device, including providing a substrate comprising a memory cell region and a peripheral circuit region defined thereon, and the peripheral circuit region comprising at least an active region formed therein, forming at least a buried gate structure in the active region, and an insulating layer being formed on a top of the buried gate structure, and forming a conductive line structure on the buried gate structure, and the conductive line structure and the buried gate structure being physically spaced apart and electrically isolated from each other by the insulating layer.
Public/Granted literature
- US12317474B2 Method for forming memory device with buried gate in peripheral circuit region Public/Granted day:2025-05-27
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