Invention Grant
US5598362A Apparatus and method for performing both 24 bit and 16 bit arithmetic
失效
用于执行24位和16位运算的装置和方法
- Patent Title: Apparatus and method for performing both 24 bit and 16 bit arithmetic
- Patent Title (中): 用于执行24位和16位运算的装置和方法
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Application No.: US361406Application Date: 1994-12-22
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Publication No.: US5598362APublication Date: 1997-01-28
- Inventor: Judah L. Adelman , Paul Marino , Avner Goren , Garth Hillman
- Applicant: Judah L. Adelman , Paul Marino , Avner Goren , Garth Hillman
- Applicant Address: IL Schaumburg
- Assignee: Motorola Inc.
- Current Assignee: Motorola Inc.
- Current Assignee Address: IL Schaumburg
- Main IPC: G06F7/00
- IPC: G06F7/00 ; G06F5/00 ; G06F7/57 ; G06F9/302 ; G06F9/315 ; G06F9/32 ; G06F7/38
Abstract:
A data ALU (arithmetic logic unit) (54) in a data processing system (20) performs both 24-bit arithmetic, and 16-bit exact arithmetic (including shifting and logical operations) using the same hardware. For a multiply/accumulate operation in 16-bit exact mode, shifting operations are used to align the operands so that 16-bit exact mode is transparent to a user. An entire instruction set can be executed in 24-bit mode or 16-bit exact mode. The same instructions and hardware are used in both modes. A transition between modes is performed by changing a status bit (97) in a status register (95).
Public/Granted literature
- US5048960A Microspectroscope Public/Granted day:1991-09-17
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