Invention Grant
US5992012A Method for making electrical interconnections between layers of an IC
package
失效
用于在IC封装的层之间进行电互连的方法
- Patent Title: Method for making electrical interconnections between layers of an IC package
- Patent Title (中): 用于在IC封装的层之间进行电互连的方法
-
Application No.: US971769Application Date: 1997-11-17
-
Publication No.: US5992012APublication Date: 1999-11-30
- Inventor: Scott Kirkman
- Applicant: Scott Kirkman
- Applicant Address: CA Milpitas
- Assignee: LSI Logic Corporation
- Current Assignee: LSI Logic Corporation
- Current Assignee Address: CA Milpitas
- Main IPC: H01L21/48
- IPC: H01L21/48 ; H05K1/00 ; H05K1/11 ; H05K3/00 ; H05K3/40 ; H05K3/42 ; H05K3/36
Abstract:
In the manufacture of Printed Circuit (PC) boards, conductors are placed in a base layer of glass cloth. The conductors penetrate the thickness of the cloth and can be arranged to form a matrix or grid. The arrangement of cloth and conductors is then cured with resin with the wire lengths disposed within the cured board core. The wire lengths can be made flush with the board core surfaces and become the electrical conductors between circuitry on such surfaces. In one embodiment, the wire is removed leaving a finished hole ready for standard through-hole plating. These finished circuit boards can be stacked and laminated forming through, blind, or buried vias. One or more finished circuit boards with imbedded vias can be used as circuitry redistribution layers to avoid dense circuit patterns in applications such as in flip-chip mounting of integrated circuit chips. In another embodiment, the conductors are imbedded in the glass cloth with sufficient density to form a composite thick conductor. Other layers can then be laminated or built up on this composite and multiple vias can then be formed to the thick conductor using conventional techniques.
Public/Granted literature
- US5355794A Process and apparatus for dry printing Public/Granted day:1994-10-18
Information query
IPC分类: