Invention Grant
US6157250A Method and apparatus for clock uncertainty minimization with a clean
power source
失效
用于清洁电源的时钟不确定度最小化的方法和装置
- Patent Title: Method and apparatus for clock uncertainty minimization with a clean power source
- Patent Title (中): 用于清洁电源的时钟不确定度最小化的方法和装置
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Application No.: US360072Application Date: 1999-07-23
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Publication No.: US6157250APublication Date: 2000-12-05
- Inventor: Sergio D. Camerlo
- Applicant: Sergio D. Camerlo
- Applicant Address: CA San Jose
- Assignee: Cisco Technology, Inc.
- Current Assignee: Cisco Technology, Inc.
- Current Assignee Address: CA San Jose
- Main IPC: G06F1/10
- IPC: G06F1/10 ; H05K1/02 ; H01L25/00
Abstract:
A method and apparatus for drastically reducing timing uncertainties in clocked digital circuits simply, at virtually no cost, and using only standard clock drivers and simple, inexpensive electrical components is described. The method includes the steps of minimizing timing uncertainties by controlling both clock skew and clock jitter. Intrinsic clock skew is eliminated by ganging the outputs of a multi-line clock together onto a capacitive metal island disposed on a printed circuit board (PCB). Extrinsic clock skew is controlled through the use of wide, relatively high-capacitance traces of matched length and disposed on a single, common signal layer of the PCB, each leading to a respective receiver circuit and terminated identically. Clock jitter is controlled by electrically isolating a region of the PCB, disposing the clock driver in the region in such a way as to minimize noise, and providing quiet local power and ground to the region.
Public/Granted literature
- US5605256A Fluid dispenser apparatus Public/Granted day:1997-02-25
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