Invention Grant
- Patent Title: Multi-layer printed circuit with low noise
- Patent Title (中): 多层印刷电路噪音低
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Application No.: US11055617Application Date: 2005-02-11
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Publication No.: US07183492B2Publication Date: 2007-02-27
- Inventor: Shih-Chieh Chao , Chih-Wen Huang , Chun-Lin Liao
- Applicant: Shih-Chieh Chao , Chih-Wen Huang , Chun-Lin Liao
- Applicant Address: TW
- Assignee: Tatung Co., Ltd.
- Current Assignee: Tatung Co., Ltd.
- Current Assignee Address: TW
- Agency: Bacon & Thomas PLLC
- Priority: TW93133515A 20041103
- Main IPC: H05K1/03
- IPC: H05K1/03

Abstract:
A multi-layer printed circuit board having a low noise characteristic, the multi-layer printed circuit board includes: at least one circuit layer; at least one isolation line for dividing the at least one circuit layer into at least two areas, the at least one isolation line forms an open pattern and the at least one isolation line extendedly forms a long neck line into the at least one area, and an internal opening of the long neck line located at a geometric center of the at least one area to improve the isolation, especially for the noises near the resonant frequencies of the isolation areas.
Public/Granted literature
- US20060090930A1 Multi-layer printed circuit with low noise Public/Granted day:2006-05-04
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