Invention Grant
- Patent Title: Direct conversion circuit having reduced bit errors
- Patent Title (中): 直接转换电路具有减少的位错误
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Application No.: US10801370Application Date: 2004-03-16
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Publication No.: US07209723B2Publication Date: 2007-04-24
- Inventor: Takeo Suzuki , Shigeru Osada
- Applicant: Takeo Suzuki , Shigeru Osada
- Applicant Address: JP Tokyo
- Assignee: ALPS Electric Co., Ltd.
- Current Assignee: ALPS Electric Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Brinks Hofer Gilson & Lione
- Priority: JP2003-076939 20030320
- Main IPC: H04B1/06
- IPC: H04B1/06

Abstract:
A direct conversion circuit includes first and second mixers to which a radio frequency signal is input. An oscillator supplies the first and second mixers with local oscillation signals whose phases are orthogonal to each other. A baseband processing circuit processes baseband signals output from the first and second mixers. A level-difference correcting circuit which corrects the two baseband signals input to the baseband processing circuit so that the levels of both are equal to each other is provided in a stage before the first and second mixers. The levels of the baseband signals are corrected by changing relative levels of the radio frequency signal input to the first mixer and the radio frequency signal input to the second mixer.
Public/Granted literature
- US20040185812A1 Direct conversion circuit having reduced bit errors Public/Granted day:2004-09-23
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