Invention Grant
- Patent Title: Methods for manufacturing a hybrid integrated circuit device
- Patent Title (中): 混合集成电路装置的制造方法
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Application No.: US10421921Application Date: 2003-04-24
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Publication No.: US07250352B2Publication Date: 2007-07-31
- Inventor: Masahiko Mizutani , Sadamichi Takakusaki , Motoichi Nezu , Kazutoshi Motegi , Mitsuru Noguchi
- Applicant: Masahiko Mizutani , Sadamichi Takakusaki , Motoichi Nezu , Kazutoshi Motegi , Mitsuru Noguchi
- Applicant Address: JP Osaka
- Assignee: Sanyo Electric Co., Ltd.
- Current Assignee: Sanyo Electric Co., Ltd.
- Current Assignee Address: JP Osaka
- Agency: Watchstone P+D, plc
- Agent Stephen B. Parker
- Priority: JP2002-121750 20020424; JP2002-253987 20020830
- Main IPC: H01L21/46
- IPC: H01L21/46

Abstract:
In preferred embodiments, a method of manufacturing a hybrid integrated circuit device is provided, in which a plurality of circuit substrates 10 are manufactured from a single metal substrate 10A′ by dicing. In some embodiments, the method includes: preparing a metal substrate 10A′ having an insulating layer 11 formed on the top surface thereof; forming a plurality of conductive patterns 12 on the top surface of insulating layer 11; forming grooves 20 in lattice form on the rear surface of metal substrate 10B′; mounting hybrid integrated circuits onto conductive patterns 12; and separating individual circuit substrates 10 with, for example, a rotatable cutter.
Public/Granted literature
- US20030232489A1 Methods for manufacturing a hybrid integrated circuit device Public/Granted day:2003-12-18
Information query
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