Invention Grant
- Patent Title: Tailoring impedances of conductive traces in a circuit board
- Patent Title (中): 调整电路板导电迹线的阻抗
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Application No.: US10437619Application Date: 2003-05-14
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Publication No.: US07259968B2Publication Date: 2007-08-21
- Inventor: Mitchel E. Wright
- Applicant: Mitchel E. Wright
- Applicant Address: US TX Houston
- Assignee: Hewlett-Packard Development Company, L.P.
- Current Assignee: Hewlett-Packard Development Company, L.P.
- Current Assignee Address: US TX Houston
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H05K1/14

Abstract:
A multi-layer circuit board includes a first layer having at least first and second conductive traces of different widths and the same impedance. One of a first power plane and first ground plane has a void region such that the first conductive trace is spaced apart from the first power plane by a first thickness, and the second conductive trace is spaced apart from the first ground plane by a second, different thickness.
Public/Granted literature
- US20040228100A1 Tailoring impedances of conductive traces in a circuit board Public/Granted day:2004-11-18
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