Invention Grant
US07260685B2 Memory hub and access method having internal prefetch buffers 有权
具有内部预取缓冲区的内存集线器和访问方法

Memory hub and access method having internal prefetch buffers
Abstract:
A memory module includes a memory hub coupled to several memory devices. The memory hub includes history logic that predicts on the basis of read memory requests which addresses in the memory devices from which date are likely to be subsequently read. The history logic applies prefetch suggestions corresponding to the predicted addresses to a memory sequencer, which uses the prefetch suggestions to generate prefetch requests that are coupled to the memory devices. Data read from the memory devices responsive to the prefetch suggestions are stored in a prefetch buffer. Tag logic stores prefetch addresses corresponding to addresses from which data have been prefetched. The tag logic compares the memory request addresses to the prefetch addresses to determine if the requested read data are stored in the prefetch buffer. If so, the requested data are read from the prefetch buffer. Otherwise, the requested data are read from the memory devices.
Public/Granted literature
Information query
Patent Agency Ranking
0/0