Invention Grant
US07408752B2 On-chip ESD protection circuit for compound semiconductor heterojunction bipolar transistor RF circuits
有权
用于化合物半导体异质结双极晶体管RF电路的片上ESD保护电路
- Patent Title: On-chip ESD protection circuit for compound semiconductor heterojunction bipolar transistor RF circuits
- Patent Title (中): 用于化合物半导体异质结双极晶体管RF电路的片上ESD保护电路
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Application No.: US11755631Application Date: 2007-05-30
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Publication No.: US07408752B2Publication Date: 2008-08-05
- Inventor: Yin Tat Ma , Guann Pyng Li
- Applicant: Yin Tat Ma , Guann Pyng Li
- Applicant Address: US CA Oakland
- Assignee: The Regents of the University of California
- Current Assignee: The Regents of the University of California
- Current Assignee Address: US CA Oakland
- Agency: Myers Dawes Andras & Sherman LLP
- Agent Daniel L. Dawes
- Main IPC: H02H9/00
- IPC: H02H9/00 ; H02H3/20 ; H02H9/04 ; H02H3/22 ; H02H7/00

Abstract:
A low loading capacitance on-chip electrostatic discharge (ESD) protection circuit for compound semiconductor power amplifiers is disclosed, which does not degrade the circuit RF performance. Its principle of operation and simulation results regarding capacitance loading, leakage current, degradation to RF performance are disclosed. The design, loading effect over frequency, robustness over process and temperature variation and application to an RF power amplifier is presented in detail. The ESD circuit couples an input to ground during ESD surges through a diode string coupled to the input, and a transistor switch or Darlington pair having its gate coupled to and triggered by the diode string. The Darlington pair couples the input to ground when triggered through a low impedance path in parallel to the diode string. A reverse diode also couples ground to the input on reverse surges.
Public/Granted literature
- US20070223158A1 ON-CHIP ESD PROTECTION CIRCUIT FOR COMPOUND SEMICONDUCTOR HETEROJUNCTION BIPOLAR TRANSITOR RF CIRCUITS Public/Granted day:2007-09-27
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