Invention Grant
- Patent Title: Process for producing circuit board
- Patent Title (中): 电路板生产工艺
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Application No.: US11581589Application Date: 2006-10-17
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Publication No.: US07441330B2Publication Date: 2008-10-28
- Inventor: Kenji Takano , Munekazu Shibata , Kazuya Arai , Junichi Kanai , Kaoru Sugimoto
- Applicant: Kenji Takano , Munekazu Shibata , Kazuya Arai , Junichi Kanai , Kaoru Sugimoto
- Applicant Address: JP Kawasaki
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kawasaki
- Agency: Kratz, Quintos & Hanson, LLP
- Priority: JP2006-166980 20060616
- Main IPC: H05K3/02
- IPC: H05K3/02

Abstract:
A process for producing a circuit board includes the steps of etching the third metal layer of a three-layer metal laminate into a predetermined interconnection pattern by photolithography; forming a laminate on the interconnection pattern by a buildup method, the laminate including interconnection patterns with insulating layers provided therebetween, the interconnection patterns being electrically connected to each other; separating a first metal layer from a supporting substrate to detach the laminate; removing the first metal layer of the three-layer metal laminate by etching using a second metal layer as a barrier layer; and removing the exposed second metal layer by etching.
Public/Granted literature
- US20070289128A1 Process for producing circuit board Public/Granted day:2007-12-20
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