Invention Grant
- Patent Title: Multilayer printed wiring board and a process of producing same
- Patent Title (中): 多层印刷电路板及其制造方法
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Application No.: US11429103Application Date: 2006-05-08
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Publication No.: US07470865B2Publication Date: 2008-12-30
- Inventor: Takashi Fushie , Takeshi Kagatsume , Shigekazu Matsui
- Applicant: Takashi Fushie , Takeshi Kagatsume , Shigekazu Matsui
- Applicant Address: JP Tokyo
- Assignee: Hoya Corporation
- Current Assignee: Hoya Corporation
- Current Assignee Address: JP Tokyo
- Agency: Westerman, Hattori, Daniels & Adrian, LLP.
- Priority: JP11-147811 19990527; JP2000-149570 20000522
- Main IPC: H01R12/04
- IPC: H01R12/04 ; H05K1/11

Abstract:
A multilayer printed wiring board which permits the formation of fine wiring patterns, thereby increasing the density of wiring patterns. Using photosensitive glass having a coefficient of thermal expansion close to that of a copper film as a core substrate, a through hole is formed in the photosensitive glass by photolithography, a sputtering silicon oxide layer and a sputtering silicon nitride layer are formed to prevent leak of alkali metal ions from the photosensitive glass, a sputtering chromium layer, a sputtering chromium-copper layer and a sputtering copper layer are formed to enhance the adhesion strength between the copper film and the sputtering silicon oxide layer, and a copper film of 1 to 20 μm thick is formed. With resin filled into the interior of the through hole, a wiring layer is patterned by etching, an insulating layer is formed, and the surface is covered with a surface treatment layer and a cover coat.
Public/Granted literature
- US20060191710A1 Multilayer printed wiring board and a process of producing same Public/Granted day:2006-08-31
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