Invention Grant
- Patent Title: Electronic devices
- Patent Title (中): 电子设备
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Application No.: US10538870Application Date: 2003-12-12
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Publication No.: US07482207B2Publication Date: 2009-01-27
- Inventor: Thomas Meredith Brown , Henning Sirringhaus
- Applicant: Thomas Meredith Brown , Henning Sirringhaus
- Applicant Address: GB Cambridge
- Assignee: Plastic Logic Limited
- Current Assignee: Plastic Logic Limited
- Current Assignee Address: GB Cambridge
- Agency: Sughrue Mion, PLLC
- Priority: GB0229191.2 20021214
- International Application: PCT/GB03/05435 WO 20031212
- International Announcement: WO2004/055920 WO 20040701
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A method for forming an electronic device in a multilayer structure comprising the steps of: defining a topographic profile in a laterally extending first layer; depositing at least one non-planarizing layer on top of the first layer such that the topographic profile of the surface of the or each non-planarizing layer conforms to that of the laterally extending first layer; and depositing a pattern of at least one additional layer onto the top-most non-planarizing layer, such that the lateral location of the additional layer is defined by the shape of the topographic profile of the non-planarizing layer, and whereby the additional layer is laterally aligned with the topographic profile in the first layer.
Public/Granted literature
- US20060148167A1 Electronic devices Public/Granted day:2006-07-06
Information query
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