Invention Grant
- Patent Title: Manufacturing method of chip integrated substrate
- Patent Title (中): 芯片集成基板的制造方法
-
Application No.: US11257717Application Date: 2005-10-25
-
Publication No.: US07521283B2Publication Date: 2009-04-21
- Inventor: Yoshihiro Machida , Takaharu Yamano
- Applicant: Yoshihiro Machida , Takaharu Yamano
- Applicant Address: JP Nagano
- Assignee: Shinko Electric Industries Co., Ltd.
- Current Assignee: Shinko Electric Industries Co., Ltd.
- Current Assignee Address: JP Nagano
- Agency: Ladas & Parry LLP
- Priority: JP2004-354172 20041207
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A manufacturing method of a chip integrated substrate is disclosed. The manufacturing method includes a first step that forms a wiring structure to be connected to a semiconductor chip on a first core substrate; a second step that disposes the semiconductor chip on a second core substrate; and a third step that bonds the first core substrate on which the wiring structure is formed to the second core substrate on which the semiconductor chip is disposed. In addition, the manufacturing method includes a step that removes the first core substrate after the third step and a step that removes the second core substrate after the third step.
Public/Granted literature
- US20060121718A1 Manufacturing method of chip integrated substrate Public/Granted day:2006-06-08
Information query
IPC分类: