Invention Grant
US07642136B2 Method and apparatus for reducing stresses applied to bonded interconnects between substrates
失效
减少施加到基板之间的接合互连的应力的方法和装置
- Patent Title: Method and apparatus for reducing stresses applied to bonded interconnects between substrates
- Patent Title (中): 减少施加到基板之间的接合互连的应力的方法和装置
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Application No.: US11749981Application Date: 2007-05-17
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Publication No.: US07642136B2Publication Date: 2010-01-05
- Inventor: Kean Seong Hooi
- Applicant: Kean Seong Hooi
- Applicant Address: US IL Schaumburg
- Assignee: Motorola, Inc.
- Current Assignee: Motorola, Inc.
- Current Assignee Address: US IL Schaumburg
- Agent Larry Brown; Sylvia Chen
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/48
Abstract:
A method (200) is provided for reducing stresses applied to one or more bonded interconnects (106) of a substrate (103) and a PCB (Printed Circuit Board) (104). The method comprises the steps of coupling (204) a compound (108) on a top surface of the substrate, wherein the compound has the property of expanding when a heat profile is applied thereto, coupling (206) a cover (102) to the PCB that overhangs at least a portion of the compound, and applying (208) the heat profile to the compound and optionally the cover and/or PCB. More than one apparatus implementing the method is also included.
Public/Granted literature
- US20080119014A1 METHOD AND APPARATUS FOR REDUCING STRESSES APPLIED TO BONDED INTERCONNECTS BETWEEN SUBSTRATES Public/Granted day:2008-05-22
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