Invention Grant
- Patent Title: LOCOS self-aligned twin well with a co-planar silicon surface
- Patent Title (中): LOCOS自对准双井与共面硅表面
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Application No.: US11343179Application Date: 2006-01-30
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Publication No.: US07642181B2Publication Date: 2010-01-05
- Inventor: Gayle W. Miller, Jr. , Irwin D. Rathbun , Bryan D. Sendelweck , Thomas S. Moss, III
- Applicant: Gayle W. Miller, Jr. , Irwin D. Rathbun , Bryan D. Sendelweck , Thomas S. Moss, III
- Applicant Address: US CA San Jose
- Assignee: Atmel Corporation
- Current Assignee: Atmel Corporation
- Current Assignee Address: US CA San Jose
- Agency: Schwegman, Lundberg & Woessner P.A.
- Main IPC: H01L21/425
- IPC: H01L21/425
Abstract:
A method and system for providing a twin well in a semiconductor device is described. The method and system include masking a first portion of the device such that a second portion of the device is exposed. A sacrificial layer has a first portion on the first portion of the device and a second portion on the second portion of the device. In one aspect, an oxidation stop layer may be below the sacrificial layer. The method and system include implanting a first well in the second portion of the device, exposing the first portion of the device after the first well is implanted, and oxidizing the second portion of sacrificial layer after the exposing. The method and system further include implanting the second well in the first portion of the device after the oxidizing and planarizing the device after the second well is implanted.
Public/Granted literature
- US20070178677A1 Locos self-aligned twin well with a co-planar silicon surface Public/Granted day:2007-08-02
Information query
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