Invention Grant
- Patent Title: Simple technique for reduction of gain in a voltage controlled oscillator
- Patent Title (中): 降低压控振荡器增益的简单技术
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Application No.: US11693660Application Date: 2007-03-29
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Publication No.: US07642867B2Publication Date: 2010-01-05
- Inventor: Tacettin Isik
- Applicant: Tacettin Isik
- Applicant Address: US CA San Jose
- Assignee: Integrated Device Technology, Inc.
- Current Assignee: Integrated Device Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Beaver, Hoffman & Harms, LLP
- Main IPC: H03L7/099
- IPC: H03L7/099

Abstract:
A ring oscillator circuit having an odd plurality of inverter stages (i.e., 2N+1 stages). In accordance with one embodiment of the present invention, only one of the inverter stages is operated in response to a variable input voltage, while the remaining inverter stages are operated in response to a highly filtered constant input voltage. The inverter stages that operate in response to the constant input voltage oscillate at a base frequency. The inverter stage that operates in response to the variable input voltage causes the frequency of the output signal to deviate from the base frequency by an amount determined by the variable input voltage. In this manner, the variable voltage inverter stage implements frequency control for the ring oscillator. The gain of the ring oscillator circuit is reduced by a factor of (2N+1) with respect to the gain of a conventional ring oscillator.
Public/Granted literature
- US20080238556A1 Simple Technique For Reduction Of Gain In A Voltage Controlled Oscillator Public/Granted day:2008-10-02
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