In the case where graphic data GD1 needing a high-speed rendering are to be written in a frame memory (14) from an image writing unit (1), the graphic data GD1 are written in the frame memory (14) in accordance with an instruction from the image writing unit (1) irrespective of the read state of graphic data GD2 to be read from the frame memory (14). In the case of the graphic data GD1 needing an ordinary speed, on the other hand, a write wait signal WT is outputted from a data write control unit (2) to the image writing unit (1) for the period till the read of the graphic data GD2 from the frame memory (14) ends. For the period while the write wait signal WT is being outputted, the write of the graphic data GD1 from the graphic data writing unit (1) is made to wait.