A signal processor includes an in-phase and quadrature (I/Q) detection module that generates I/Q components based on baseband signals. An analog to digital converter converts the I/Q components to digital I/Q components. An I/Q imbalance compensation module generates compensated I/Q components based on the digital I/Q components and maximum likelihood estimates of gain imbalance and phase imbalance. A frequency converting module converts the compensated I/Q components to first subcarrier signals. A channel estimating module generates initial channel estimates based on second subcarrier signals. The second subcarrier signals are based on the first subcarrier signals. A phase error and I/Q imbalance module generates the maximum likelihood estimates of the gain imbalance and the phase imbalance based on the initial channel estimates and the second subcarrier signals.