Invention Grant
- Patent Title: Method for manufacturing multilayer chip capacitor
- Patent Title (中): 多层片式电容器制造方法
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Application No.: US11822189Application Date: 2007-07-03
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Publication No.: US07644480B2Publication Date: 2010-01-12
- Inventor: Hyoung Ho Kim , Hyo Soon Shin , Ho Sung Choo
- Applicant: Hyoung Ho Kim , Hyo Soon Shin , Ho Sung Choo
- Applicant Address: KR Kyungki-do
- Assignee: Samsung Electro-Mechanics Co., Ltd.
- Current Assignee: Samsung Electro-Mechanics Co., Ltd.
- Current Assignee Address: KR Kyungki-do
- Agency: McDermott Will & Emery LLP
- Priority: KR10-2004-0110924 20041223
- Main IPC: H01G4/005
- IPC: H01G4/005

Abstract:
A method for manufacturing a multilayer chip capacitor includes: forming screen patterns on mother green sheets such that a widthwise margin is not formed on the mother green sheets, the screen patterns are spaced apart from each other in the width direction and the longitudinal direction, and a width of each screen pattern is greater than a spacing between the adjacent screen patterns; forming internal electrode patterns on the mother green sheets; forming a stack of the mother green sheets; forming a capacitor body having internal electrodes by cutting the stack of the mother green sheets along cutting lines arranged in the width direction and the longitudinal direction; forming chip-protecting side members on both sides of the capacitor body such that the chip-protecting side members contact both sides of the internal electrodes, respectively; and forming a pair of terminal electrodes on the outer surface of the capacitor body.
Public/Granted literature
- US20070251066A1 Multilayer chip capacitor and method for manufacturing the same Public/Granted day:2007-11-01
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