Invention Grant
- Patent Title: Gate structures of a non-volatile memory device and methods of manufacturing the same
- Patent Title (中): 非易失性存储器件的门结构及其制造方法
-
Application No.: US11375762Application Date: 2006-03-15
-
Publication No.: US07646056B2Publication Date: 2010-01-12
- Inventor: Han-Mei Choi , Kyoung-Ryul Yoon , Seung-Hwan Lee , Ki-Yeon Park , Young-Sun Kim
- Applicant: Han-Mei Choi , Kyoung-Ryul Yoon , Seung-Hwan Lee , Ki-Yeon Park , Young-Sun Kim
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Myers Bigel Sibley & Sajovec, P.A.
- Priority: KR10-2005-0027080 20050331
- Main IPC: H01L29/792
- IPC: H01L29/792

Abstract:
In a gate structure of a non-volatile memory device is formed, a tunnel insulating layer and a charge trapping layer are formed on a substrate. A composite dielectric layer is formed on the charge trapping layer and has a laminate structure in which first material layers including aluminum oxide and second material layers including hafnium oxide or zirconium oxide are alternately stacked. A conductive layer is formed on the composite dielectric layer and then a gate structure is formed by patterning the conductive layer, the composite dielectric layer, the charge trapping layer, and the tunnel insulating layer.
Public/Granted literature
- US20060220106A1 Gate structures of a non-volatile memory device and methods of manufacturing the same Public/Granted day:2006-10-05
Information query
IPC分类: