Invention Grant
- Patent Title: Pipeline type analog-digital converter having redundant comparator
- Patent Title (中): 具有冗余比较器的管线式模数转换器
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Application No.: US12068187Application Date: 2008-02-04
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Publication No.: US07646324B2Publication Date: 2010-01-12
- Inventor: Tomoya Matsubayashi
- Applicant: Tomoya Matsubayashi
- Applicant Address: JP Kawasaki, Kanagawa
- Assignee: NEC Electronics Corporation
- Current Assignee: NEC Electronics Corporation
- Current Assignee Address: JP Kawasaki, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2007-039623 20070220
- Main IPC: H03M1/38
- IPC: H03M1/38

Abstract:
A pipeline type analog-digital converter includes a first to an N-th (N is an integer of not less than 2) stages (101 to 10N) brought into cascade connection and converting an analog signal input from a preceding stage to a digital signal of a predetermined bit and outputting the digital signal. Each of the first to the (N−1)-th stages (101 to 10N−1) includes an analog-digital converter circuit including comparators comparing an analog signal with reference potential being determined in advance and mutually different in parallel. The first to the (N−1)-th stages are in redundant configuration with the comparators of the stage including an auxiliary comparator.
Public/Granted literature
- US20080198055A1 Pipeline type analog-digital converter having redundant comparator Public/Granted day:2008-08-21
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