Invention Grant
US07647509B2 Method and apparatus for managing power in a processing system with multiple partitions
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用于在具有多个分区的处理系统中管理电力的方法和装置
- Patent Title: Method and apparatus for managing power in a processing system with multiple partitions
- Patent Title (中): 用于在具有多个分区的处理系统中管理电力的方法和装置
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Application No.: US11433944Application Date: 2006-05-12
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Publication No.: US07647509B2Publication Date: 2010-01-12
- Inventor: Saul Lewites , Krystof Zmudzinski
- Applicant: Saul Lewites , Krystof Zmudzinski
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agent D'Ann Naylor Rifai
- Main IPC: G06F1/00
- IPC: G06F1/00

Abstract:
A processing system may include a first processing unit for a first partition and a second processing unit for a second partition. To support power management, an interrupt handler in the processing system may receive a standby command from an operating system. In response to receiving the standby command, the interrupt handler may cause the first processing unit to transition into a reduced power mode. After the second partition detects a wake event, the second partition may cause the first processing unit to transition out of the reduced power mode. In an example embodiment, the interrupt handler executes within the first partition, and the first processing unit transitions into the reduced power mode by entering an idle loop within the interrupt handler. The first partition may determine from within the idle loop whether the first partition has been released from the low power state. Other embodiments are described and claimed.
Public/Granted literature
- US20070266264A1 Method and apparatus for managing power in a processing system with multiple partitions Public/Granted day:2007-11-15
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