A method for creating new vias in an integrated circuit chip. The method automatically creates a plurality of new vias around an original via for electrically connecting two metal layers to each other in circuit layout data of the integrated circuit chip. The new vias also electrically connect the two metal layers to each other. According to the new vias, the probability of certainly electrically connecting the two metal layers of the integrated circuit chip to each other can be increased when the integrated circuit chip is being manufactured.