Invention Grant
- Patent Title: Method for fabricating a semiconductor device
- Patent Title (中): 半导体器件的制造方法
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Application No.: US12027430Application Date: 2008-02-07
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Publication No.: US07648867B2Publication Date: 2010-01-19
- Inventor: Masataka Watanabe , Hiroshi Yano
- Applicant: Masataka Watanabe , Hiroshi Yano
- Applicant Address: JP Yamanashi
- Assignee: Eudyna Devices Inc.
- Current Assignee: Eudyna Devices Inc.
- Current Assignee Address: JP Yamanashi
- Agency: Westerman, Hattori, Daniels & Adrian, LLP
- Priority: JP2007-028607 20070207
- Main IPC: H01L21/338
- IPC: H01L21/338

Abstract:
A method for fabricating a semiconductor device includes: forming a dummy gate that defines a region in which a gate electrode should be formed on a semiconductor substrate; forming a surface film on the semiconductor substrate by directional sputtering vertical to a surface of the semiconductor substrate, the directional sputtering being one of collimate sputtering, long throw sputtering and ion beam sputtering; removing the surface film formed along a sidewall of the dummy gate; removing the dummy gate; and forming the gate electrode in the region from which the dummy gate on the semiconductor substrate has been removed.
Public/Granted literature
- US20080188066A1 METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE Public/Granted day:2008-08-07
Information query
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