Invention Grant
- Patent Title: Method for fabricating semiconductor device with recess gate
- Patent Title (中): 用于制造具有凹槽的半导体器件的方法
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Application No.: US11314544Application Date: 2005-12-20
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Publication No.: US07648878B2Publication Date: 2010-01-19
- Inventor: Tae-Woo Jung
- Applicant: Tae-Woo Jung
- Applicant Address: KR Kyoungki-Do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Kyoungki-Do
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Priority: KR10-2005-0058148 20050630
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A pad oxide layer is formed on a substrate. A pad nitride layer is formed on the pad oxide layer. The pad nitride layer and the pad oxide layer are patterned. Predetermined portions of the substrate are etched using the pad nitride layer as an etch barrier to thereby form trenches used as device isolation regions. The trenches are filled with an insulation layer to thereby form device isolation regions. The pad nitride layer is removed. Recesses are formed by etching predetermined portions of the pad oxide layer and the substrate. The pad oxide layer is removed. A gate oxide layer is formed on the recesses and on the substrate. Gate structures of which bottom portions are buried in the recesses on the gate oxide layer are formed.
Public/Granted literature
- US20070004128A1 Method for fabricating semiconductor device with recess gate Public/Granted day:2007-01-04
Information query
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