Invention Grant
US07648907B2 Semiconductor device, wiring substrate forming method, and substrate processing apparatus
有权
半导体装置,布线基板的形成方法以及基板处理装置
- Patent Title: Semiconductor device, wiring substrate forming method, and substrate processing apparatus
- Patent Title (中): 半导体装置,布线基板的形成方法以及基板处理装置
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Application No.: US11727004Application Date: 2007-03-23
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Publication No.: US07648907B2Publication Date: 2010-01-19
- Inventor: Kanae Nakagawa , Masataka Mizukoshi , Kazuo Teshirogi
- Applicant: Kanae Nakagawa , Masataka Mizukoshi , Kazuo Teshirogi
- Applicant Address: JP Kawasaki
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kawasaki
- Agency: Westerman, Hattori, Daniels & Adrian, LLP.
- Priority: JP2002-358536 20021210; WOPCT/JP03/06382 20030522
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
A substrate support (201) having a flat supporting surface (201a) is prepared, and a semiconductor substrate (1) is fixed to the substrate supporting surface (201) by attaching a wiring forming surface (1a) to the supporting surface (201a) by suction, for example, by vacuum suction. On this occasion, the wiring forming surface (1a) is forcibly flattened by being attached to the supporting surface (201a) by suction, and therefore the wiring forming surface (1a) becomes a reference plane for planarization of a back surface (1b). In this state, planarization processing is performed by mechanically grinding the back surface (1b) to grind away projecting portions (12) of the back surface (1b). Hence, variations in the thickness of the substrate (especially, semiconductor substrate) are made uniform, and high-speed planarization is realized easily and inexpensively without disadvantages such as dishing and without any limitation on a wiring design.
Public/Granted literature
- US20070287282A1 Semiconductor device, wiring substrate forming method, and substrate processing apparatus Public/Granted day:2007-12-13
Information query
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