Invention Grant
- Patent Title: Method for fabricating semiconductor device with metal line
- Patent Title (中): 用金属线制造半导体器件的方法
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Application No.: US11321533Application Date: 2005-12-30
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Publication No.: US07648909B2Publication Date: 2010-01-19
- Inventor: Hae-Jung Lee , Sang-Hoon Cho , Suk-Ki Kim
- Applicant: Hae-Jung Lee , Sang-Hoon Cho , Suk-Ki Kim
- Applicant Address: KR Gyeonggi-do
- Assignee: Hynix Semiconductor, Inc.
- Current Assignee: Hynix Semiconductor, Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Law Firm PLC
- Priority: KR10-2005-0036591 20050430
- Main IPC: H01L21/4763
- IPC: H01L21/4763

Abstract:
A method for fabricating a semiconductor device includes forming an inter-layer insulation layer on a substrate; forming openings in the inter-layer insulation layer; forming a metal barrier layer in the openings and on the inter-layer insulation layer; forming a first conductive layer on the metal barrier layer and filled in the openings; etching the first conductive layer to form interconnection layers in the openings and to expose portions of the metal barrier layer, the interconnection layers being inside the openings and at a depth from a top of the openings; etching the exposed portions of the metal barrier layer to obtain a sloped profile of the metal barrier layer at top lateral portions of the openings; forming a second conductive layer over the inter-layer insulation layer, the interconnection layers and the metal barrier layer with the sloped profile; and patterning the second conductive layer to form metal lines.
Public/Granted literature
- US20060246708A1 Method for fabricating semiconductor device with metal line Public/Granted day:2006-11-02
Information query
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