Invention Grant
US07649224B2 DMOS with high source-drain breakdown voltage, small on- resistance, and high current driving capacity
有权
具有高源极漏极击穿电压,小电阻和高电流驱动能力的DMOS
- Patent Title: DMOS with high source-drain breakdown voltage, small on- resistance, and high current driving capacity
- Patent Title (中): 具有高源极漏极击穿电压,小电阻和高电流驱动能力的DMOS
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Application No.: US11956097Application Date: 2007-12-13
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Publication No.: US07649224B2Publication Date: 2010-01-19
- Inventor: Shuichi Kikuchi , Kiyofumi Nakaya , Shuji Tanaka
- Applicant: Shuichi Kikuchi , Kiyofumi Nakaya , Shuji Tanaka
- Applicant Address: JP Osaka JP Gunma
- Assignee: Sanyo Electric Co., Ltd.,Sanyo Semiconductor Co., Ltd.
- Current Assignee: Sanyo Electric Co., Ltd.,Sanyo Semiconductor Co., Ltd.
- Current Assignee Address: JP Osaka JP Gunma
- Agency: Morrison & Foerster LLP
- Main IPC: H01L23/62
- IPC: H01L23/62

Abstract:
This invention is directed to offer a MOS transistor that has a high source-drain breakdown BVds, a low on resistance and a high electric current driving capacity. On resistance is lowered by forming an N well layer for lowering on resistance in the drift region. The N well layer is disposed beneath the gate electrode and away from the N well layer with a certain space between them. This space ensures the withstand voltage at the edge of the gate electrode of the drain layer side. Also, the N well layer is formed on the surface of an epitaxial layer in the region that includes a P+L layer. The edge of the N well layer of the drain layer side is located near the edge of the P+L layer of the drain layer side and away from the N well layer. This space makes the expansion of depletion layer from the P+L layer easier, further improving the withstand voltage.
Public/Granted literature
- US20090152627A1 SEMICONDUCTOR DEVICE Public/Granted day:2009-06-18
Information query
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