Invention Grant
US07649256B2 Semiconductor chip having pollished and ground bottom surface portions
有权
半导体芯片具有抛物面和底面底面部分
- Patent Title: Semiconductor chip having pollished and ground bottom surface portions
- Patent Title (中): 半导体芯片具有抛物面和底面底面部分
-
Application No.: US11176642Application Date: 2005-07-08
-
Publication No.: US07649256B2Publication Date: 2010-01-19
- Inventor: Hiroshi Kujirai , Kiyonori Oyu
- Applicant: Hiroshi Kujirai , Kiyonori Oyu
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2004-204845 20040712
- Main IPC: H01L21/30
- IPC: H01L21/30

Abstract:
A semiconductor chip having a thickness of 130 micrometers or less includes a mechanically ground bottom surface corresponding to a central circuit area, and a polished bottom surface corresponding to a peripheral scribe area. The mechanically ground bottom surface prevents heavy metals attached onto the bottom surface of the wafer from diffusing toward the source/drain regions of the semiconductor substrate and thereby from degrading the transistor characteristics.
Public/Granted literature
- US20060006528A1 Semiconductor chip having pollished and ground bottom surface portions Public/Granted day:2006-01-12
Information query
IPC分类: