Invention Grant
US07649393B2 Semiconductor integrated circuit having active and sleep modes and non-retention flip-flop that is initialized when switching from sleep mode to active mode
有权
具有活动和睡眠模式的半导体集成电路以及从休眠模式切换到活动模式时被初始化的非保持触发器
- Patent Title: Semiconductor integrated circuit having active and sleep modes and non-retention flip-flop that is initialized when switching from sleep mode to active mode
- Patent Title (中): 具有活动和睡眠模式的半导体集成电路以及从休眠模式切换到活动模式时被初始化的非保持触发器
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Application No.: US12213437Application Date: 2008-06-19
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Publication No.: US07649393B2Publication Date: 2010-01-19
- Inventor: Tasuku Maeda
- Applicant: Tasuku Maeda
- Applicant Address: JP Chiba
- Assignee: Kawasaki Microelectronics, Inc.
- Current Assignee: Kawasaki Microelectronics, Inc.
- Current Assignee Address: JP Chiba
- Agency: Oliff & Berridge, PLC
- Priority: JP2007-163069 20070620
- Main IPC: H03K3/02
- IPC: H03K3/02

Abstract:
A semiconductor integrated circuit has an active mode and a sleep mode. The semiconductor integrated circuit is constructed by alternately connecting a plurality of combinational logic circuits and a plurality of flip-flops. The flip-flops include a retention flip-flop that is supplied with electric power and retains the data in the sleep mode, and a non-retention flip-flop that is not supplied with electric power during the sleep mode. The non-retention flip-flop includes an initializing circuit that initializes the non-retention flip-flop when the semiconductor integrated circuit is switched from the sleep mode to the active mode.
Public/Granted literature
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