A latch is provided that includes a first inverter, a second inverter, a first latch circuit and a second latch circuit. The first inverter to receive the first clock signal from an input port and to provide a clock signal. The second inverter to receive the first clock signal from the input port and to provide a clock signal. The first latch circuit is to store data and to receive a clock signal from the second inverter. The second latch circuit is further to store data and to receive a clock signal from the first inverter.