Invention Grant
- Patent Title: Semiconductor memory device
- Patent Title (中): 半导体存储器件
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Application No.: US11834932Application Date: 2007-08-07
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Publication No.: US07649761B2Publication Date: 2010-01-19
- Inventor: Yukako Hattori , Katsumi Abe , Masami Masuda , Hiroshi Nakamura
- Applicant: Yukako Hattori , Katsumi Abe , Masami Masuda , Hiroshi Nakamura
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2006-214951 20060807
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
Shunt regions are formed at certain intervals in a memory cell array region as extending in a second direction. The shunt regions each include a contact formed to connect a word line or a signal line wired in the same direction to another metal wire. Extension regions are each formed of an extension of the shunt region in the data cache array region. Data input/output lines extend in a first direction and transfer data on bit lines simultaneously via a data cache array. Sense circuits are arranged around the data cache array and connected to the data input/output lines respectively. The data input/output lines are divided at a certain interval in the first direction. The divided portions are connected to respective leads formed in the extension region in the longitudinal direction thereof and connected to the sense circuits via the leads.
Public/Granted literature
- US20080285324A1 SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2008-11-20
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