Invention Grant
US07649773B2 Row selector circuit for electrically programmable and erasable non volatile memories
有权
用于电可编程和可擦除非易失性存储器的行选择器电路
- Patent Title: Row selector circuit for electrically programmable and erasable non volatile memories
- Patent Title (中): 用于电可编程和可擦除非易失性存储器的行选择器电路
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Application No.: US12244717Application Date: 2008-10-02
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Publication No.: US07649773B2Publication Date: 2010-01-19
- Inventor: Paolo Rolandi
- Applicant: Paolo Rolandi
- Applicant Address: IT Agrate Brianza
- Assignee: STMicroelectronics, S.r.l.
- Current Assignee: STMicroelectronics, S.r.l.
- Current Assignee Address: IT Agrate Brianza
- Agency: Graybeal Jackson LLP
- Agent Kevin D. Jablonski
- Priority: ITMI05A1578 20050812
- Main IPC: G11C16/00
- IPC: G11C16/00
Abstract:
The invention relates to a row decoder circuit for non volatile memory devices of the electrically programmable and erasable type, for example of the Flash EEPROM type having a NOR architecture. The proposed row decoder circuit allows to carry out the erasing step very quickly, for example with a granularity emulating at least 16 kB and even overcoming by at least 2 kB Flash memories of the NAND type. The memory can thus maintain high performances in terms of random access speed but shows a high erasing speed typical of memory architectures of the NAND type.
Public/Granted literature
- US20090027965A1 ROW SELECTOR CIRCUIT FOR ELECTRICALLY PROGRAMMABLE AND ERASABLE NON VOLATILE MEMORIES Public/Granted day:2009-01-29
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