Invention Grant
- Patent Title: Apparatus to implement dual hash algorithm
- Patent Title (中): 实现双重散列算法的装置
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Application No.: US10531843Application Date: 2002-10-21
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Publication No.: US07649990B2Publication Date: 2010-01-19
- Inventor: Bernard Plessier , Ming-Kiat Yap
- Applicant: Bernard Plessier , Ming-Kiat Yap
- Applicant Address: SG Singapore
- Assignee: STMicroelectronics Asia Pacific Pte. Ltd.
- Current Assignee: STMicroelectronics Asia Pacific Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agent David V. Carlson; Lisa K. Jorgenson
- International Application: PCT/SG02/00245 WO 20021021
- International Announcement: WO2004/042602 WO 20040521
- Main IPC: H04L9/32
- IPC: H04L9/32 ; H04K1/00 ; H04L9/00 ; H04L1/00 ; H03K17/16 ; H03K19/003

Abstract:
An apparatus arranged to accept digital data as an input and to process the data according to one of either the Secure Hash Algorithm (SHA-1) or Message Digest (MD5) algorithm to produce a fixed length output word. The apparatus includes a plurality of rotational registers for storing data, one of the registers arranged to receive the input data, and data stores for initialization of some of the plurality of registers according to whether the SHA-1 or MD5 algorithm is used. The data stores include fixed data relating to SHA-1 and MD5 operation. Also included is a plurality of dedicated combinatorial logic circuits arranged to perform logic operations on data stored in selected ones of the plurality of registers.
Public/Granted literature
- US20080123841A1 Apparatus to Implement Dual Hash Algorithm Public/Granted day:2008-05-29
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