Invention Grant
US07650539B2 Observing debug counter values during system operation 失效
在系统运行期间观察调试计数器值

Observing debug counter values during system operation
Abstract:
A debugging architecture includes a set of debug counters for counting one or more events based on a set of signals from a device being monitored. The architecture provides for observing the outputs of the debug counters during operation of the device. The outputs of the counters are provided to an output bus (e.g., a Debug Bus) via an output bus interface during operation of the device being monitored. A data gathering system can access the output bus in order to gather the data from the counters for analysis.
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