A method and device for determining memory element and intermediate point correspondences between design models is disclosed. The method includes developing graph representations of two circuit design models of an electronic device. The circuit design models each include input and output nodes corresponding to input and output nodes of the electronic device. The circuit design models also include memory and intermediate nodes corresponding to memory elements and intermediate points, respectively of the electronic device. An intermediate point represents a point between memory elements of the electronic device, and so can represent logic gates or other modules of the device. Memory elements and intermediate points can be referred to collectively as circuit elements. Nodes in the graph representation represent inputs, outputs, memory elements or intermediate points in the design models. A correspondence between the circuit elements in circuit design models is determined based on the graph representations.