Invention Grant
US07652332B2 Extremely-thin silicon-on-insulator transistor with raised source/drain
有权
极薄的绝缘体上硅晶体管,具有升高的源极/漏极
- Patent Title: Extremely-thin silicon-on-insulator transistor with raised source/drain
- Patent Title (中): 极薄的绝缘体上硅晶体管,具有升高的源极/漏极
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Application No.: US11837057Application Date: 2007-08-10
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Publication No.: US07652332B2Publication Date: 2010-01-26
- Inventor: Eduard A. Cartier , Steven J. Koester , Kingsuk Maitra , Amlan Majumdar , Renee T. Mo
- Applicant: Eduard A. Cartier , Steven J. Koester , Kingsuk Maitra , Amlan Majumdar , Renee T. Mo
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Fleit, Gibbons, Gutman, Bongini & Bianco P.L.
- Agent Stephen Bongini
- Main IPC: H01L27/01
- IPC: H01L27/01

Abstract:
An extremely-thin silicon-on-insulator transistor is provided that includes a buried oxide layer above a substrate, a silicon layer above the buried oxide layer, a gate stack on the silicon layer, a nitride liner on the silicon layer and adjacent to the gate stack, an oxide liner on and adjacent to the nitride liner, and raised source/drain regions. The gate stack includes a high-k oxide layer on the silicon layer and a metal gate on the high-k oxide layer. Each of the raised source/drain regions has a first part comprising a portion of the silicon layer, a second part adjacent to parts of the oxide liner and the nitride liner, and a third part above the second part. Also provided is a method for fabricating an extremely-thin silicon-on-insulator transistor.
Public/Granted literature
- US20090039426A1 EXTREMELY-THIN SILICON-ON-INSULATOR TRANSISTOR WITH RAISED SOURCE/DRAIN Public/Granted day:2009-02-12
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