Invention Grant
US07652505B2 Level conversion circuit for converting voltage amplitude of signal
有权
用于转换信号电压幅度的电平转换电路
- Patent Title: Level conversion circuit for converting voltage amplitude of signal
- Patent Title (中): 用于转换信号电压幅度的电平转换电路
-
Application No.: US12230007Application Date: 2008-08-21
-
Publication No.: US07652505B2Publication Date: 2010-01-26
- Inventor: Teruaki Kanzaki
- Applicant: Teruaki Kanzaki
- Applicant Address: JP Tokyo
- Assignee: Renesas Technology Corp.
- Current Assignee: Renesas Technology Corp.
- Current Assignee Address: JP Tokyo
- Agency: Buchanan Ingersoll & Rooney PC
- Priority: JP2004-273007 20040921; JP2005-176591 20050616
- Main IPC: H03K19/0175
- IPC: H03K19/0175 ; H03K19/094 ; H03K19/00 ; H03K19/02 ; H03K19/20 ; H03K3/01 ; G01R19/00 ; G11C7/00 ; H03F3/45 ; H03L5/00 ; G05F1/10 ; G05F3/02

Abstract:
In a level conversion circuit, two P channel MOS transistors form a current mirror circuit. When an input signal rises from the “L” level to the “H” level, an N channel MOS transistor connected to a drain of one P channel MOS transistor is brought out of conduction to prevent a leak current from flowing through two P channel MOS transistors, which decreases a power consumption. In addition, when the input signal rises from the “L” level to the “H” level, a P channel MOS transistor connected to a drain of the other P channel MOS transistor is brought into conduction to fix a potential of a node of the drain of the other P channel MOS transistor to the “H” level, which prevents the potential of the node from becoming unstable.
Public/Granted literature
- US20090002026A1 Level conversion circuit for converting voltage amplitude of signal Public/Granted day:2009-01-01
Information query
IPC分类: