Invention Grant
- Patent Title: Fine clock resolution digital phase locked loop apparatus
- Patent Title (中): 精细时钟分辨率数字锁相环装置
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Application No.: US11905936Application Date: 2007-10-05
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Publication No.: US07652540B2Publication Date: 2010-01-26
- Inventor: Toshihiro Shigemori
- Applicant: Toshihiro Shigemori
- Applicant Address: JP Tokyo
- Assignee: Ricoh Company, Ltd.
- Current Assignee: Ricoh Company, Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Dickstein Shapiro LLP
- Priority: JP2005-038890 20050216
- Main IPC: H03L7/091
- IPC: H03L7/091

Abstract:
A digital phase locked loop apparatus includes an input signal time detecting device that detects a phase of an input signal with prescribed time resolution obtained by dividing a cycle of an operation clock generated by a clock generator at a prescribed time. An output clock generating device outputs output clock time data per the one cycle in accordance with frequency control data. The output clock time data has a value corresponding to a phase of a virtual output clock generated by dividing the operation clock in accordance with the time resolution. A phase difference detecting device detects a difference between phases of the input signal and the virtual output clock, and outputs a phase difference signal in accordance with the detection result. The frequency control device changes the frequency control data in accordance with the phase difference signal.
Public/Granted literature
- US20080068094A1 Fine clock resolution digital phase locked loop apparatus Public/Granted day:2008-03-20
Information query
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