Invention Grant
US07653167B2 Phase deglitch circuit for phase interpolator for high-speed serial I/O applications 有权
用于高速串行I / O应用的相位内插器的相位去离子电路

Phase deglitch circuit for phase interpolator for high-speed serial I/O applications
Abstract:
Various embodiments provide a Phase Interpolator (PI) that receives input clocks, and outputs intersymbol interference-equalized, phase-shifted output clocks. In one embodiment, the Phase Interpolator comprises two PI Conditioners and a PI Mixer. In one embodiment, a PI Conditioner receives input clocks and is controlled by a different phase-shifted input clock by using a suitable circuit element, such as a flip-flop. Collectively, the input clock-controlled PI Conditioner and Mixer act in concert to control the band limiting effect of the PI Conditioner which, in turn, equalizes intersymbol interference.
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