Invention Grant
- Patent Title: Hardware task manager
- Patent Title (中): 硬件任务经理
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Application No.: US10443501Application Date: 2003-05-21
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Publication No.: US07653710B2Publication Date: 2010-01-26
- Inventor: W. James Scheuermann , Eugene B. Hogenauer
- Applicant: W. James Scheuermann , Eugene B. Hogenauer
- Applicant Address: US CA Palo Alto
- Assignee: QST Holdings, LLC.
- Current Assignee: QST Holdings, LLC.
- Current Assignee Address: US CA Palo Alto
- Agency: Nixon & Peabody LLP
- Agent Jennifer Hayes
- Main IPC: G06F15/173
- IPC: G06F15/173 ; G06F9/46 ; G06F3/00

Abstract:
A hardware task manager for managing operations in an adaptive computing system. The task manager indicates when input and output buffer resources are sufficient to allow a task to execute. The task can require an arbitrary number of input values from one or more other (or the same) tasks. Likewise, a number of output buffers must also be available before the task can start to execute and store results in the output buffers. The hardware task manager maintains a counter in association with each input and output buffer. For input buffers, a negative value for the counter means that there is no data in the buffer and, hence, the respective input buffer is not ready or available. Thus, the associated task can not run. Predetermined numbers of bytes, or “units,” are stored into the input buffer and an associated counter is incremented. When the counter value transitions from a negative value to a zero the high-order bit of the counter is cleared, thereby indicating the input buffer has sufficient data and is available to be processed by a task.
Public/Granted literature
- US20040025159A1 Hardware task manager Public/Granted day:2004-02-05
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