Invention Grant
- Patent Title: Fault-tolerant computer and method of controlling data transmission
- Patent Title (中): 容错计算机和数据传输控制方法
-
Application No.: US11302176Application Date: 2005-12-14
-
Publication No.: US07653764B2Publication Date: 2010-01-26
- Inventor: Fumitoshi Mizutani
- Applicant: Fumitoshi Mizutani
- Applicant Address: JP Tokyo
- Assignee: NEC Corporation
- Current Assignee: NEC Corporation
- Current Assignee Address: JP Tokyo
- Agency: Foley & Lardner LLP
- Priority: JP2004-369389 20041221
- Main IPC: G06F13/28
- IPC: G06F13/28 ; G06F5/00 ; G06F11/00

Abstract:
A fault-tolerant computer is capable of performing a data flow control process in a short period of time. The fault-tolerant computer includes a pair of duplicate systems each having a CPU subsystem and an IO subsystem. The IO subsystems of the duplicate systems are connected to each other through a cross link. The CPU system has an inbound reception buffer which receives data sent from the IO subsystem, and when the amount of the received data reaches a first threshold value, sends a first signal to the IO subsystem, and when the amount of the received data reaches a second threshold value greater than the first threshold value, sends a second signal to the IO subsystem. The IO subsystem has an IO I/F controller to stop sending data to the CPU subsystem when the IO I/F controller receives the first signal and the second signal, and a flow controller to send the second signal to the IO I/F controller of the paired IO subsystem through the cross link after the flow controller receives the second signal.
Public/Granted literature
- US20060150000A1 Fault-tolerant computer and method of controlling data transmission Public/Granted day:2006-07-06
Information query