Invention Grant
US07653807B2 Removing a pipeline bubble by blocking clock signal to downstream stage when downstream stage contains invalid data 有权
当下游阶段包含无效数据时,通过将时钟信号阻塞到下游阶段来消除管道气泡

Removing a pipeline bubble by blocking clock signal to downstream stage when downstream stage contains invalid data
Abstract:
One embodiment of the present invention provides a system that removes a bubble from a pipeline. During operation, the system first detects a stall in the pipeline. The system next determines whether a first register contains invalid data, which is associated with a bubble. Next, the system determines whether a second register contains valid data, wherein the second register is adjacent to and upstream from the first register. If the first register contains invalid data and the second register contains valid data, the system replaces the invalid data of the first register with valid data based on the valid data in the second register without propagating the invalid data to a downstream register. As a result, the system removes the invalid data from the pipeline.
Public/Granted literature
Information query
Patent Agency Ranking
0/0