Invention Grant
- Patent Title: Semiconductor device and method of adding tester circuit for the same
- Patent Title (中): 半导体器件和方法相加的测试电路
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Application No.: US11700151Application Date: 2007-01-31
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Publication No.: US07653852B2Publication Date: 2010-01-26
- Inventor: Masakazu Maehara
- Applicant: Masakazu Maehara
- Applicant Address: JP Kanagawa
- Assignee: NEC Electronics Corporation
- Current Assignee: NEC Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Foley & Lardner LLP
- Priority: JP2006-033835 20060210
- Main IPC: G01R31/28
- IPC: G01R31/28

Abstract:
A semiconductor device according to an embodiment of the present invention includes: a plurality of clock domains including a plurality of logic circuits operating in accordance with a clock signal; and a control circuit selectively supplying the clock signal to a predetermined number of clock domains selected from the plurality of clock domains based on a control signal.
Public/Granted literature
- US20070192660A1 Semiconductor device and method of adding tester circuit for the same Public/Granted day:2007-08-16
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