Invention Grant
US07654466B2 Semiconductor memory card, semiconductor memory control apparatus, and semiconductor memory control method
有权
半导体存储卡,半导体存储器控制装置和半导体存储器控制方法
- Patent Title: Semiconductor memory card, semiconductor memory control apparatus, and semiconductor memory control method
- Patent Title (中): 半导体存储卡,半导体存储器控制装置和半导体存储器控制方法
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Application No.: US10553725Application Date: 2004-09-13
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Publication No.: US07654466B2Publication Date: 2010-02-02
- Inventor: Takuji Maeda , Shinji Inoue , Yoshiho Gotoh , Jun Ohara , Masahiro Nakanishi , Shoichi Tsujita , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Koichi Horiuchi , Manabu Inoue
- Applicant: Takuji Maeda , Shinji Inoue , Yoshiho Gotoh , Jun Ohara , Masahiro Nakanishi , Shoichi Tsujita , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Koichi Horiuchi , Manabu Inoue
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Smith Patent Office
- Priority: JP2003-325811 20030918
- International Application: PCT/JP2004/013703 WO 20040913
- International Announcement: WO2005/029311 WO 20050331
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
A host information memory is provided in a semiconductor memory card and a data write start address and a data size supplied by an access unit are stored. A free physical area generation section determines whether or not to perform erasing of an invalid block of a nonvolatile memory when writing of data based on the data write start address and data size, and determines the number of blocks to be erased. When erasing, writing of data and erasing of invalid blocks are simultaneously performed with respect to different memory chips. Erase process of data, herewith, can be optimized and high speed access from the access unit to a semiconductor memory card can be realized.
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