Invention Grant
- Patent Title: Method for depositing a metal gate on a high-k dielectric film
- Patent Title (中): 在高k电介质膜上沉积金属栅极的方法
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Application No.: US11347256Application Date: 2006-02-06
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Publication No.: US07655549B2Publication Date: 2010-02-02
- Inventor: Wickramanayaka Sunil , Motomu Kosuda , Naoki Yamada , Naomu Kitano
- Applicant: Wickramanayaka Sunil , Motomu Kosuda , Naoki Yamada , Naomu Kitano
- Applicant Address: JP Tokyo
- Assignee: Canon Anelva Corporation
- Current Assignee: Canon Anelva Corporation
- Current Assignee Address: JP Tokyo
- Agency: Buchanan, Ingersoll & Rooney, PC
- Priority: JP2005-051340 20050225
- Main IPC: H01L21/3205
- IPC: H01L21/3205 ; H01L21/4763 ; H01L21/31 ; H01L21/469
Abstract:
A method to improve a high-k dielectric film and metal gate interface in the fabrication of a MOSFET by depositing a metal gate on a high-k dielectric, the method includes annealing a substrate with a high-k dielectric film deposited thereon in a thermal annealing module and depositing a metal gate material on the annealed substrate in a metal gate deposition module, wherein the annealing step and the depositing step are carried out consecutively without a vacuum break.
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