Invention Grant
- Patent Title: IC with comparator receiving expected and mask data from pads
- Patent Title (中): IC与比较器接收来自焊盘的预期和掩模数据
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Application No.: US12329957Application Date: 2008-12-08
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Publication No.: US07655946B2Publication Date: 2010-02-02
- Inventor: Lee D. Whetsel , Alan Hales
- Applicant: Lee D. Whetsel , Alan Hales
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; W. James Brady; Frederick J. Telecky, Jr.
- Main IPC: H01L23/58
- IPC: H01L23/58

Abstract:
Test circuits located on semiconductor die enable a tester to test a plurality of die/ICs in parallel by inputting both stimulus and response patterns to the plurality of die/ICs. The response patterns from the tester are input to the test circuits along with the output response of the die/IC to be compared. Also disclosed is the use of a response signal encoding scheme whereby the tester transmits response test commands to the test circuits, using a single signal per test circuit, to perform: (1) a compare die/IC output against an expected logic high, (2) a compare die/IC output against an expected logic low, and (3) a mask compare operation. The use of the signal encoding scheme allows functional testing of die and ICs since all response test commands (i.e. 1-3 above) required at each die/IC output can be transmitted to each die/IC output using only a single tester signal connection per die/IC output. In addition to functional testing, scan testing of die and ICs is also possible.
Public/Granted literature
- US20090089634A1 SCAN TESTING SYSTEM, METHOD AND APPARATUS Public/Granted day:2009-04-02
Information query
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