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US07656049B2 CMOS device with asymmetric gate strain 失效
具有不对称栅极应变的CMOS器件

CMOS device with asymmetric gate strain
Abstract:
The use of strained gate electrodes in integrated circuits results in a transistor having improved carrier mobility, improved drive characteristics, and reduced source drain junction leakage. The gate electrode strain is obtained through non symmetric placement of stress inducing structures as part of the gate electrode. Silicon nitride layers may be placed on one side of the gate electrode in a compressive mode, or on the other side of the gate electrode in a tensile mode to obtain similar results.
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